


ARM Macro Assembler    Page 1 


    1 00000000         ;*******************************************************
                       *************************************************
    2 00000000         ;                                               uC/OS-II
                       
    3 00000000         ;                                         The Real-Time 
                       Kernel
    4 00000000         ;
    5 00000000         ;                               (c) Copyright 1992-2006,
                        Micrium, Weston, FL
    6 00000000         ;                                          All Rights Re
                       served
    7 00000000         ;
    8 00000000         ;                                           ARM Cortex-M
                       3 Port
    9 00000000         ;
   10 00000000         ; File      : OS_CPU_A.ASM
   11 00000000         ; Version   : V2.89
   12 00000000         ; By        : Jean J. Labrosse
   13 00000000         ;             Brian Nagel
   14 00000000         ;
   15 00000000         ; For       : ARMv7M Cortex-M3
   16 00000000         ; Mode      : Thumb2
   17 00000000         ; Toolchain : RealView Development Suite
   18 00000000         ;             RealView Microcontroller Development Kit (
                       MDK)
   19 00000000         ;             ARM Developer Suite (ADS)
   20 00000000         ;             Keil uVision
   21 00000000         ;*******************************************************
                       *************************************************
   22 00000000         
   23 00000000         ;*******************************************************
                       *************************************************
   24 00000000         ;                                           PUBLIC FUNCT
                       IONS
   25 00000000         ;*******************************************************
                       *************************************************
   26 00000000         
   27 00000000                 EXTERN           OSRunning   ; External referenc
                                                            es
   28 00000000                 EXTERN           OSPrioCur
   29 00000000                 EXTERN           OSPrioHighRdy
   30 00000000                 EXTERN           OSTCBCur
   31 00000000                 EXTERN           OSTCBHighRdy
   32 00000000                 EXTERN           OSIntExit
   33 00000000                 EXTERN           OSTaskSwHook
   34 00000000                 EXTERN           OS_CPU_ExceptStkBase
   35 00000000         
   36 00000000         
   37 00000000                 EXPORT           OS_CPU_SR_Save ; Functions decl
                                                            ared in this file
   38 00000000                 EXPORT           OS_CPU_SR_Restore
   39 00000000                 EXPORT           OSStartHighRdy
   40 00000000                 EXPORT           OSCtxSw
   41 00000000                 EXPORT           OSIntCtxSw
   42 00000000                 EXPORT           PendSV_Handler
   43 00000000         
   44 00000000         ;*******************************************************
                       *************************************************
   45 00000000         ;                                                EQUATES



ARM Macro Assembler    Page 2 


                       
   46 00000000         ;*******************************************************
                       *************************************************
   47 00000000         
   48 00000000 E000ED04 
                       NVIC_INT_CTRL
                               EQU              0xE000ED04  ; Interrupt control
                                                             state register.
   49 00000000 E000ED22 
                       NVIC_SYSPRI14
                               EQU              0xE000ED22  ; System priority r
                                                            egister (priority 1
                                                            4).
   50 00000000 000000FF 
                       NVIC_PENDSV_PRI
                               EQU              0xFF        ; PendSV priority v
                                                            alue (lowest).
   51 00000000 10000000 
                       NVIC_PENDSVSET
                               EQU              0x10000000  ; Value to trigger 
                                                            PendSV exception.
   52 00000000         
   53 00000000         ;*******************************************************
                       *************************************************
   54 00000000         ;                                      CODE GENERATION D
                       IRECTIVES
   55 00000000         ;*******************************************************
                       *************************************************
   56 00000000         
   57 00000000                 AREA             |.text|, CODE, READONLY, ALIGN=
2
   58 00000000                 THUMB
   59 00000000                 REQUIRE8
   60 00000000                 PRESERVE8
   61 00000000         
   62 00000000         ;*******************************************************
                       *************************************************
   63 00000000         ;                                   CRITICAL SECTION MET
                       HOD 3 FUNCTIONS
   64 00000000         ;
   65 00000000         ; Description: Disable/Enable interrupts by preserving t
                       he state of interrupts.  Generally speaking you
   66 00000000         ;              would store the state of the interrupt di
                       sable flag in the local variable 'cpu_sr' and then
   67 00000000         ;              disable interrupts.  'cpu_sr' is allocate
                       d in all of uC/OS-II's functions that need to
   68 00000000         ;              disable interrupts.  You would restore th
                       e interrupt disable state by copying back 'cpu_sr'
   69 00000000         ;              into the CPU's status register.
   70 00000000         ;
   71 00000000         ; Prototypes :     OS_CPU_SR  OS_CPU_SR_Save(void);
   72 00000000         ;                  void       OS_CPU_SR_Restore(OS_CPU_S
                       R cpu_sr);
   73 00000000         ;
   74 00000000         ;
   75 00000000         ; Note(s)    : 1) These functions are used in general li
                       ke this:
   76 00000000         ;
   77 00000000         ;                 void Task (void *p_arg)



ARM Macro Assembler    Page 3 


   78 00000000         ;                 {
   79 00000000         ;                 #if OS_CRITICAL_METHOD == 3          /
                       * Allocate storage for CPU status register */
   80 00000000         ;                     OS_CPU_SR  cpu_sr;
   81 00000000         ;                 #endif
   82 00000000         ;
   83 00000000         ;                          :
   84 00000000         ;                          :
   85 00000000         ;                     OS_ENTER_CRITICAL();             /
                       * cpu_sr = OS_CPU_SaveSR();                */
   86 00000000         ;                          :
   87 00000000         ;                          :
   88 00000000         ;                     OS_EXIT_CRITICAL();              /
                       * OS_CPU_RestoreSR(cpu_sr);                */
   89 00000000         ;                          :
   90 00000000         ;                          :
   91 00000000         ;                 }
   92 00000000         ;*******************************************************
                       *************************************************
   93 00000000         
   94 00000000         OS_CPU_SR_Save
   95 00000000 F3EF 8010       MRS              R0, PRIMASK ; Set prio int mask
                                                             to mask all (excep
                                                            t faults)
   96 00000004 B672            CPSID            I
   97 00000006 4770            BX               LR
   98 00000008         
   99 00000008         OS_CPU_SR_Restore
  100 00000008 F380 8810       MSR              PRIMASK, R0
  101 0000000C 4770            BX               LR
  102 0000000E         
  103 0000000E         ;*******************************************************
                       *************************************************
  104 0000000E         ;                                          START MULTITA
                       SKING
  105 0000000E         ;                                       void OSStartHigh
                       Rdy(void)
  106 0000000E         ;
  107 0000000E         ; Note(s) : 1) This function triggers a PendSV exception
                        (essentially, causes a context switch) to cause
  108 0000000E         ;              the first task to start.
  109 0000000E         ;
  110 0000000E         ;           2) OSStartHighRdy() MUST:
  111 0000000E         ;              a) Setup PendSV exception priority to low
                       est;
  112 0000000E         ;              b) Set initial PSP to 0, to tell context 
                       switcher this is first run;
  113 0000000E         ;              c) Set the main stack to OS_CPU_ExceptStk
                       Base;
  114 0000000E         ;              d) Set OSRunning to TRUE;
  115 0000000E         ;              e) Trigger PendSV exception;
  116 0000000E         ;              f) Enable interrupts (tasks will run with
                        interrupts enabled).
  117 0000000E         ;*******************************************************
                       *************************************************
  118 0000000E         
  119 0000000E         OSStartHighRdy
  120 0000000E 481F            LDR              R0, =NVIC_SYSPRI14 ; Set the Pe
                                                            ndSV exception prio



ARM Macro Assembler    Page 4 


                                                            rity
  121 00000010 F04F 01FF       LDR              R1, =NVIC_PENDSV_PRI
  122 00000014 7001            STRB             R1, [R0]
  123 00000016         
  124 00000016 2000            MOVS             R0, #0      ; Set the PSP to 0 
                                                            for initial context
                                                             switch call
  125 00000018 F380 8809       MSR              PSP, R0
  126 0000001C         
  127 0000001C 481C            LDR              R0, =OS_CPU_ExceptStkBase ; Ini
                                                            tialize the MSP to 
                                                            the OS_CPU_ExceptSt
                                                            kBase
  128 0000001E 6801            LDR              R1, [R0]
  129 00000020 F381 8808       MSR              MSP, R1
  130 00000024         
  131 00000024 481B            LDR              R0, =OSRunning 
                                                            ; OSRunning = TRUE
  132 00000026 2101            MOVS             R1, #1
  133 00000028 7001            STRB             R1, [R0]
  134 0000002A         
  135 0000002A 481B            LDR              R0, =NVIC_INT_CTRL ; Trigger th
                                                            e PendSV exception 
                                                            (causes context swi
                                                            tch)
  136 0000002C F04F 5180       LDR              R1, =NVIC_PENDSVSET
  137 00000030 6001            STR              R1, [R0]
  138 00000032         
  139 00000032 B662            CPSIE            I           ; Enable interrupts
                                                             at processor level
                                                            
  140 00000034         
  141 00000034         OSStartHang
  142 00000034 E7FE            B                OSStartHang ; Should never get 
                                                            here
  143 00000036         
  144 00000036         
  145 00000036         ;*******************************************************
                       *************************************************
  146 00000036         ;                               PERFORM A CONTEXT SWITCH
                        (From task level)
  147 00000036         ;                                           void OSCtxSw
                       (void)
  148 00000036         ;
  149 00000036         ; Note(s) : 1) OSCtxSw() is called when OS wants to perf
                       orm a task context switch.  This function
  150 00000036         ;              triggers the PendSV exception which is wh
                       ere the real work is done.
  151 00000036         ;*******************************************************
                       *************************************************
  152 00000036         
  153 00000036         OSCtxSw
  154 00000036 4818            LDR              R0, =NVIC_INT_CTRL ; Trigger th
                                                            e PendSV exception 
                                                            (causes context swi
                                                            tch)
  155 00000038 F04F 5180       LDR              R1, =NVIC_PENDSVSET
  156 0000003C 6001            STR              R1, [R0]
  157 0000003E 4770            BX               LR



ARM Macro Assembler    Page 5 


  158 00000040         
  159 00000040         ;*******************************************************
                       *************************************************
  160 00000040         ;                             PERFORM A CONTEXT SWITCH (
                       From interrupt level)
  161 00000040         ;                                         void OSIntCtxS
                       w(void)
  162 00000040         ;
  163 00000040         ; Notes:    1) OSIntCtxSw() is called by OSIntExit() whe
                       n it determines a context switch is needed as
  164 00000040         ;              the result of an interrupt.  This functio
                       n simply triggers a PendSV exception which will
  165 00000040         ;              be handled when there are no more interru
                       pts active and interrupts are enabled.
  166 00000040         ;*******************************************************
                       *************************************************
  167 00000040         
  168 00000040         OSIntCtxSw
  169 00000040 4815            LDR              R0, =NVIC_INT_CTRL ; Trigger th
                                                            e PendSV exception 
                                                            (causes context swi
                                                            tch)
  170 00000042 F04F 5180       LDR              R1, =NVIC_PENDSVSET
  171 00000046 6001            STR              R1, [R0]
  172 00000048 4770            BX               LR
  173 0000004A         
  174 0000004A         ;*******************************************************
                       *************************************************
  175 0000004A         ;                                         HANDLE PendSV 
                       EXCEPTION
  176 0000004A         ;                                     void OS_CPU_PendSV
                       Handler(void)
  177 0000004A         ;
  178 0000004A         ; Note(s) : 1) PendSV is used to cause a context switch.
                         This is a recommended method for performing
  179 0000004A         ;              context switches with Cortex-M3.  This is
                        because the Cortex-M3 auto-saves half of the
  180 0000004A         ;              processor context on any exception, and r
                       estores same on return from exception.  So only
  181 0000004A         ;              saving of R4-R11 is required and fixing u
                       p the stack pointers.  Using the PendSV exception
  182 0000004A         ;              this way means that context saving and re
                       storing is identical whether it is initiated from
  183 0000004A         ;              a thread or occurs due to an interrupt or
                        exception.
  184 0000004A         ;
  185 0000004A         ;           2) Pseudo-code is:
  186 0000004A         ;              a) Get the process SP, if 0 then skip (go
                       to d) the saving part (first context switch);
  187 0000004A         ;              b) Save remaining regs r4-r11 on process 
                       stack;
  188 0000004A         ;              c) Save the process SP in its TCB, OSTCBC
                       ur->OSTCBStkPtr = SP;
  189 0000004A         ;              d) Call OSTaskSwHook();
  190 0000004A         ;              e) Get current high priority, OSPrioCur =
                        OSPrioHighRdy;
  191 0000004A         ;              f) Get current ready thread TCB, OSTCBCur
                        = OSTCBHighRdy;
  192 0000004A         ;              g) Get new process SP from TCB, SP = OSTC



ARM Macro Assembler    Page 6 


                       BHighRdy->OSTCBStkPtr;
  193 0000004A         ;              h) Restore R4-R11 from new process stack;
                       
  194 0000004A         ;              i) Perform exception return which will re
                       store remaining context.
  195 0000004A         ;
  196 0000004A         ;           3) On entry into PendSV handler:
  197 0000004A         ;              a) The following have been saved on the p
                       rocess stack (by processor):
  198 0000004A         ;                 xPSR, PC, LR, R12, R0-R3
  199 0000004A         ;              b) Processor mode is switched to Handler 
                       mode (from Thread mode)
  200 0000004A         ;              c) Stack is Main stack (switched from Pro
                       cess stack)
  201 0000004A         ;              d) OSTCBCur      points to the OS_TCB of 
                       the task to suspend
  202 0000004A         ;                 OSTCBHighRdy  points to the OS_TCB of 
                       the task to resume
  203 0000004A         ;
  204 0000004A         ;           4) Since PendSV is set to lowest priority in
                        the system (by OSStartHighRdy() above), we
  205 0000004A         ;              know that it will only be run when no oth
                       er exception or interrupt is active, and
  206 0000004A         ;              therefore safe to assume that context bei
                       ng switched out was using the process stack (PSP).
  207 0000004A         ;*******************************************************
                       *************************************************
  208 0000004A         
  209 0000004A         PendSV_Handler
  210 0000004A B672            CPSID            I           ; Prevent interrupt
                                                            ion during context 
                                                            switch
  211 0000004C F3EF 8009       MRS              R0, PSP     ; PSP is process st
                                                            ack pointer
  212 00000050 B128            CBZ              R0, PendSV_Handler_Nosave ; Ski
                                                            p register save the
                                                             first time
  213 00000052         
  214 00000052 3820            SUBS             R0, R0, #0x20 ; Save remaining 
                                                            regs r4-11 on proce
                                                            ss stack
  215 00000054 E880 0FF0       STM              R0, {R4-R11}
  216 00000058         
  217 00000058 4910            LDR              R1, =OSTCBCur ; OSTCBCur->OSTCB
                                                            StkPtr = SP;
  218 0000005A 6809            LDR              R1, [R1]
  219 0000005C 6008            STR              R0, [R1]    ; R0 is SP of proce
                                                            ss being switched o
                                                            ut
  220 0000005E         
  221 0000005E         ; At this point, entire context of process has been save
                       d
  222 0000005E         PendSV_Handler_Nosave
  223 0000005E B500            PUSH             {R14}       ; Save LR exc_retur
                                                            n value
  224 00000060 480F            LDR              R0, =OSTaskSwHook 
                                                            ; OSTaskSwHook();
  225 00000062 4780            BLX              R0
  226 00000064 F85D EB04       POP              {R14}



ARM Macro Assembler    Page 7 


  227 00000068         
  228 00000068 480E            LDR              R0, =OSPrioCur ; OSPrioCur = OS
                                                            PrioHighRdy;
  229 0000006A 490F            LDR              R1, =OSPrioHighRdy
  230 0000006C 780A            LDRB             R2, [R1]
  231 0000006E 7002            STRB             R2, [R0]
  232 00000070         
  233 00000070 480A            LDR              R0, =OSTCBCur ; OSTCBCur  = OST
                                                            CBHighRdy;
  234 00000072 490E            LDR              R1, =OSTCBHighRdy
  235 00000074 680A            LDR              R2, [R1]
  236 00000076 6002            STR              R2, [R0]
  237 00000078         
  238 00000078 6810            LDR              R0, [R2]    ; R0 is new process
                                                             SP; SP = OSTCBHigh
                                                            Rdy->OSTCBStkPtr;
  239 0000007A E890 0FF0       LDM              R0, {R4-R11} ; Restore r4-11 fr
                                                            om new process stac
                                                            k
  240 0000007E 3020            ADDS             R0, R0, #0x20
  241 00000080 F380 8809       MSR              PSP, R0     ; Load PSP with new
                                                             process SP
  242 00000084 F04E 0E04       ORR              LR, LR, #0x04 ; Ensure exceptio
                                                            n return uses proce
                                                            ss stack
  243 00000088 B662            CPSIE            I
  244 0000008A 4770            BX               LR          ; Exception return 
                                                            will restore remain
                                                            ing context
  245 0000008C         
  246 0000008C                 END
              E000ED22 
              00000000 
              00000000 
              E000ED04 
              00000000 
              00000000 
              00000000 
              00000000 
              00000000 
Command Line: --debug --xref --diag_suppress=9931 --cpu=Cortex-M3 --apcs=interw
ork --depend=..\obj\os_cpu_a.d -o..\obj\os_cpu_a.o -I.\RTE\_Target_1 -ID:\workS
oftware\stm32Software\mdk\mdkpack\Keil\STM32F2xx_DFP\2.9.0\Drivers\CMSIS\Device
\ST\STM32F2xx\Include -ID:\workSoftware\stm32Software\mdk\mdkcore\ARM\CMSIS\Inc
lude --predefine="__MICROLIB SETA 1" --predefine="__UVISION_VERSION SETA 529" -
-predefine="STM32F207xx SETA 1" --list=.\listings\os_cpu_a.lst ..\UCOS-II\Ports
\os_cpu_a.asm



ARM Macro Assembler    Page 1 Alphabetic symbol ordering
Relocatable symbols

.text 00000000

Symbol: .text
   Definitions
      At line 57 in file ..\UCOS-II\Ports\os_cpu_a.asm
   Uses
      None
Comment: .text unused
OSCtxSw 00000036

Symbol: OSCtxSw
   Definitions
      At line 153 in file ..\UCOS-II\Ports\os_cpu_a.asm
   Uses
      At line 40 in file ..\UCOS-II\Ports\os_cpu_a.asm
Comment: OSCtxSw used once
OSIntCtxSw 00000040

Symbol: OSIntCtxSw
   Definitions
      At line 168 in file ..\UCOS-II\Ports\os_cpu_a.asm
   Uses
      At line 41 in file ..\UCOS-II\Ports\os_cpu_a.asm
Comment: OSIntCtxSw used once
OSStartHang 00000034

Symbol: OSStartHang
   Definitions
      At line 141 in file ..\UCOS-II\Ports\os_cpu_a.asm
   Uses
      At line 142 in file ..\UCOS-II\Ports\os_cpu_a.asm
Comment: OSStartHang used once
OSStartHighRdy 0000000E

Symbol: OSStartHighRdy
   Definitions
      At line 119 in file ..\UCOS-II\Ports\os_cpu_a.asm
   Uses
      At line 39 in file ..\UCOS-II\Ports\os_cpu_a.asm
Comment: OSStartHighRdy used once
OS_CPU_SR_Restore 00000008

Symbol: OS_CPU_SR_Restore
   Definitions
      At line 99 in file ..\UCOS-II\Ports\os_cpu_a.asm
   Uses
      At line 38 in file ..\UCOS-II\Ports\os_cpu_a.asm
Comment: OS_CPU_SR_Restore used once
OS_CPU_SR_Save 00000000

Symbol: OS_CPU_SR_Save
   Definitions
      At line 94 in file ..\UCOS-II\Ports\os_cpu_a.asm
   Uses
      At line 37 in file ..\UCOS-II\Ports\os_cpu_a.asm
Comment: OS_CPU_SR_Save used once
PendSV_Handler 0000004A

Symbol: PendSV_Handler



ARM Macro Assembler    Page 2 Alphabetic symbol ordering
Relocatable symbols

   Definitions
      At line 209 in file ..\UCOS-II\Ports\os_cpu_a.asm
   Uses
      At line 42 in file ..\UCOS-II\Ports\os_cpu_a.asm
Comment: PendSV_Handler used once
PendSV_Handler_Nosave 0000005E

Symbol: PendSV_Handler_Nosave
   Definitions
      At line 222 in file ..\UCOS-II\Ports\os_cpu_a.asm
   Uses
      At line 212 in file ..\UCOS-II\Ports\os_cpu_a.asm
Comment: PendSV_Handler_Nosave used once
9 symbols



ARM Macro Assembler    Page 1 Alphabetic symbol ordering
Absolute symbols

NVIC_INT_CTRL E000ED04

Symbol: NVIC_INT_CTRL
   Definitions
      At line 48 in file ..\UCOS-II\Ports\os_cpu_a.asm
   Uses
      At line 135 in file ..\UCOS-II\Ports\os_cpu_a.asm
      At line 154 in file ..\UCOS-II\Ports\os_cpu_a.asm
      At line 169 in file ..\UCOS-II\Ports\os_cpu_a.asm

NVIC_PENDSVSET 10000000

Symbol: NVIC_PENDSVSET
   Definitions
      At line 51 in file ..\UCOS-II\Ports\os_cpu_a.asm
   Uses
      At line 136 in file ..\UCOS-II\Ports\os_cpu_a.asm
      At line 155 in file ..\UCOS-II\Ports\os_cpu_a.asm
      At line 170 in file ..\UCOS-II\Ports\os_cpu_a.asm

NVIC_PENDSV_PRI 000000FF

Symbol: NVIC_PENDSV_PRI
   Definitions
      At line 50 in file ..\UCOS-II\Ports\os_cpu_a.asm
   Uses
      At line 121 in file ..\UCOS-II\Ports\os_cpu_a.asm
Comment: NVIC_PENDSV_PRI used once
NVIC_SYSPRI14 E000ED22

Symbol: NVIC_SYSPRI14
   Definitions
      At line 49 in file ..\UCOS-II\Ports\os_cpu_a.asm
   Uses
      At line 120 in file ..\UCOS-II\Ports\os_cpu_a.asm
Comment: NVIC_SYSPRI14 used once
4 symbols



ARM Macro Assembler    Page 1 Alphabetic symbol ordering
External symbols

OSIntExit 00000000

Symbol: OSIntExit
   Definitions
      At line 32 in file ..\UCOS-II\Ports\os_cpu_a.asm
   Uses
      None
Comment: OSIntExit unused
OSPrioCur 00000000

Symbol: OSPrioCur
   Definitions
      At line 28 in file ..\UCOS-II\Ports\os_cpu_a.asm
   Uses
      At line 228 in file ..\UCOS-II\Ports\os_cpu_a.asm
Comment: OSPrioCur used once
OSPrioHighRdy 00000000

Symbol: OSPrioHighRdy
   Definitions
      At line 29 in file ..\UCOS-II\Ports\os_cpu_a.asm
   Uses
      At line 229 in file ..\UCOS-II\Ports\os_cpu_a.asm
Comment: OSPrioHighRdy used once
OSRunning 00000000

Symbol: OSRunning
   Definitions
      At line 27 in file ..\UCOS-II\Ports\os_cpu_a.asm
   Uses
      At line 131 in file ..\UCOS-II\Ports\os_cpu_a.asm
Comment: OSRunning used once
OSTCBCur 00000000

Symbol: OSTCBCur
   Definitions
      At line 30 in file ..\UCOS-II\Ports\os_cpu_a.asm
   Uses
      At line 217 in file ..\UCOS-II\Ports\os_cpu_a.asm
      At line 233 in file ..\UCOS-II\Ports\os_cpu_a.asm

OSTCBHighRdy 00000000

Symbol: OSTCBHighRdy
   Definitions
      At line 31 in file ..\UCOS-II\Ports\os_cpu_a.asm
   Uses
      At line 234 in file ..\UCOS-II\Ports\os_cpu_a.asm
Comment: OSTCBHighRdy used once
OSTaskSwHook 00000000

Symbol: OSTaskSwHook
   Definitions
      At line 33 in file ..\UCOS-II\Ports\os_cpu_a.asm
   Uses
      At line 224 in file ..\UCOS-II\Ports\os_cpu_a.asm
Comment: OSTaskSwHook used once
OS_CPU_ExceptStkBase 00000000




ARM Macro Assembler    Page 2 Alphabetic symbol ordering
External symbols

Symbol: OS_CPU_ExceptStkBase
   Definitions
      At line 34 in file ..\UCOS-II\Ports\os_cpu_a.asm
   Uses
      At line 127 in file ..\UCOS-II\Ports\os_cpu_a.asm
Comment: OS_CPU_ExceptStkBase used once
8 symbols
356 symbols in table
