fix(fpga): use absolute TD bitstream output path

fpga/fpga_pwm_trace_project/scripts/build.sh

@@ -29,7 +29,7 @@ if [ ! -s "$BIT" ]; then
     exit 1
 fi
 
-if ! grep -q 'BIT-1004 : Generate bits file build/td/fpga_pwm_trace.bit' "$LOG"; then
+if ! grep -Eq 'BIT-1004 : Generate bits file .*fpga_pwm_trace\.bit' "$LOG"; then
     echo "ERROR: TD log does not contain the expected BIT-1004 success marker" >&2
     exit 1
 fi

fpga/fpga_pwm_trace_project/scripts/td_build.tcl

@@ -1,20 +1,35 @@
+set HWCI_PROJECT_DIR [pwd]
+set HWCI_TD_OUT_DIR [file normalize [file join $HWCI_PROJECT_DIR build td]]
+
+file mkdir $HWCI_TD_OUT_DIR
+
+set HWCI_RTL_AREA [file join $HWCI_TD_OUT_DIR fpga_pwm_trace_rtl.area]
+set HWCI_RTL_DB   [file join $HWCI_TD_OUT_DIR fpga_pwm_trace_rtl.db]
+set HWCI_GATE_AREA [file join $HWCI_TD_OUT_DIR fpga_pwm_trace_gate.area]
+set HWCI_GATE_DB   [file join $HWCI_TD_OUT_DIR fpga_pwm_trace_gate.db]
+set HWCI_BIT       [file join $HWCI_TD_OUT_DIR fpga_pwm_trace.bit]
+
+puts "HWCI_PROJECT_DIR=$HWCI_PROJECT_DIR"
+puts "HWCI_TD_OUT_DIR=$HWCI_TD_OUT_DIR"
+puts "HWCI_BIT=$HWCI_BIT"
+
 open_project fpga_pwm_trace.al
 elaborate -top pwm_trace_top
 read_adc constraints/pwm_trace.adc
 read_sdc constraints/pwm_trace.sdc
 
 optimize_rtl
-report_area -file build/td/fpga_pwm_trace_rtl.area
-export_db build/td/fpga_pwm_trace_rtl.db
+report_area -file $HWCI_RTL_AREA
+export_db $HWCI_RTL_DB
 
-optimize_gate -packarea build/td/fpga_pwm_trace_gate.area
-report_area -file build/td/fpga_pwm_trace_gate.area
+optimize_gate -packarea $HWCI_GATE_AREA
+report_area -file $HWCI_GATE_AREA
 legalize_phy_inst
-export_db build/td/fpga_pwm_trace_gate.db
+export_db $HWCI_GATE_DB
 
 place
 route
 
-bitgen -bit build/td/fpga_pwm_trace.bit
+bitgen -bit $HWCI_BIT
 
 exit